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patch/wf_wm/sys_patch_mcu.c axi_mon_trigger == 0 %s(), Done
0 ==>%s(), SHA_mon triggered %d times
DEVAPC IRQ handler HIF ==>%s(), Done
SHA_MON IRQ handler AXI_MON test handler sha_monitor_irq_handler devapc_irq_handler MCU_Patch_init ENTRY_cos_set_reset_handler [WARN] WF_ACTIVATE_CAL GET SEMA FAIL
[WARN] WF_ACQUIRE_SEMA_CAL GET SEMA FAIL
[WARN] Patch_wifi_is_cal_done WF CAL SEMA FAIL
==>%s(), Patch_wifi_rom_api_dispatcher start sha.
==>%s(), Patch_wifi_rom_api_dispatcher start sha done.
WIFI_PCIE_L2_SEND_PME
addr_16B_uin:0x%x
wdata0:0x%x
wdata1:0x%x
wdata2:0x%x
wdata3:0x%x
ucKeySel:0x%x
wdata4:0x%x
wdata5:0x%x
wdata6:0x%x
wdata7:0x%x
Port Not support !! Polling sleep protect fail!! Patch_wifi_rom_api_dispatcher patch/wf_wm/cal/hal_cal_flow_rom_patch.c Invalid ID %d
%s
Patch_halPhyCalFlowInit WFSUBMIT \WFDUMPCR WFPARALL CAL: phyCalTxFdSelfCheck T[%d]W[%d]G[%d]
CAL: TxFD(Threshold) A-comp-IRR[%d],TH[%d],TH2[%d]
CAL: TxFD(Tone) A-comp-IRR[%d],B-comp-IRR[%d]
CAL: DC-SIG [0x%x]= 0x%x
CAL: ST-SIG [0x%x]= 0x%x
CAL(Load): WrongCase G[%d]W[%d]
patch/wf_wm/cal/hal_cal_manu_rom_patch.c CY_Log Enter Patch_phyTxFlatness_MT7763: WF[%d] BW[%d] Ch[%d]
CY_Log Link budget after DPC-6dB: DPC[0x%x] RFGC[0x%x]
CY_Log TSSI DC cal.: u4TSSIDC[0x%x]
CY_Log Loop[%d] g_ai4TonePwrLinear[0x%x]
CY_Log 0x8300D034[0x%x]
CY_Log 0x8300D038[0x%x]
CY_Log 0x8300D03C[0x%x]
CY_Log 0x8300D040[0x%x]
CY_Log 0x8300D044[0x%x]
N $ ( ` d h
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Patch_set_ext_palna_antsel INVALID ELNA MODE %d
u1AntCtrl[%d] G14[%d] G16[%d] G11[%d] G15[%d]
Patch_set_dbdc_bpf_gpio_ctrl %d
Set_spdt_3ant_gpio_ctrl %d
Set_spdt_2ant_gpio_ctrl %d
patch/common/sys_patch_common_mcu.c ((task_type >= 0) && (task_type < MAX_COS_TASK_NUM)) STACKEND Ext32SwDtct. err
Ext32SwDtct.
%s get sema fail!
@@ pPatch_USB_Ultra_Low_Power_Clock_Release ;exp_main_reentry (%d) !!!!! ;lp=%x, sp=%x, it=%x, ev=%x, ip=%x ;NMI status=0x%x WDT(to N9)
WDT(to Host)
IDLM monitor
APB/AHB bus timeout
PAD_EINT
access RAM error
error!! never come here
;=====Customized DBG UART Log Begin=====
;=====Customized DBG UART Log End=====
;=====Customized DBG DUMP Log Begin=====
;=====Customized DBG DUMP Log End=====
, WFSYS , id= idle , isr= , irq= , lr= , ipc= , eva= , swid= , itype= , exp_t= ;etype:%s, sp=%x, merr=%x, s[%d]-[%d], s[%d]-[%d], i[%d]-[%d], i[%d]-[%d]
;lp=%x, it=%x, ev=%x, ip=%x
;exp_main: jump from exception
;sp=%x, merr=%x, s[%d]-[%d], s[%d]-[%d], i[%d]-[%d], i[%d]-[%d]
;exp_main: jump from cos_assert
;[remaining Target Region] coredump buffer is full(0x%x)!!!
;Total coredump time=0x%x, Total MEM/CR dump size=0x%x
;coredump end
;;agg num = %d, current = %x, end=%x
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; exception type: %s
;;[CONNSYS] coredump start ..
;==================================================
;QUEUE INFO
;QUE SIZE PEAK CURR
;%c%c%c%cQ %d %d %d
; |-- SRC DST MID DATA TIME
; |-- %d %d %d 0x%x %d
;==================================================
; registers
R.S %s 0x%x
;A die chip ID abnormal = 0x%x
;(sched_info_%d)sched_t=%x, sched_start=%d
;(irq_info_%d)irq_t=%x, sched_start=%d
;(eint_info_%d)eint_status=0x%x, sched_start=%d
, rc= !RB_FULL , asr_t= %s ;IDLM_PROT_IRQ CR(0x89040D30) = 0x%x
;IDLM_PROT_IRQ_0 trigger
;IDLM_PROT_IRQ_1 trigger
;IDLM_PROT_IRQ_2 trigger
;IDLM_PROT_IRQ_3 trigger
;IDLM_PROT_IRQ_4 trigger
;IDLM_PROT_IRQ_5 trigger
;RAM ACCESS ERROR IRQ Status CR(0x8800040C)= 0x%x
;IBANK0 PD SLP ACCESS DETECT
;IBANK1 PD SLP ACCESS DETECT
;DBANK0 PD SLP ACCESS DETECT
;DBANK1 PD SLP ACCESS DETECT
;SYSRAM PD SLP ACCESS DETECT
;AHB Timeout debug CR (0x%x) = 0x%x
;bus_TO_dbg_UR
;0x%x = 0x%x
;PC log contorl=%x(T=0x%x)
;PC log(%d)=0x%x
;LR log contorl=%x(T=0x%x)
;LR log(%d)=0x%x
;bus_TO_dbg_Dump
;Debug CIRQ Status: 0x%x
;DBG_CIRQ0 - WDT to N10
;DBG_CIRQ1 - WDT to Host
;DBG_CIRQ2 - IDLM moniter
;DBG_CIRQ3 - APB/AHB bus timeout
;DBG_CIRQ4 - PAD_EINT
;DBG_CIRQ5 - access RAM error
;AXI Bus monitor detect ! systime: 0x%x ipc: 0x%x fetch addr: 0x%x
;WF patch ccif error
BT patch ccif error
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